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in System Integration by

Embedded Wizard version 9.00

Keil MDK-ARM 5.24.1

When i use property Buffered = true for effect of type FadeInOutTransition works OK, 

but when property Buffered = false i get MemManage_Handler 

and see in debugger in NVIC->MMFAR  that was an attempt to use memory address, that is outside of Double Buffer addresses range (= <Double Buffer end address> + 1) . And thus MPU generates the exception.

External SRAM of 16 MB size (address range 0xC000 0000-0xC0FF FFFF). 

Display size 800*480; Platform Package STM.STM32.RGB888

Embedded Wisard frame buffers allocated at the beginning of External SRAM and at the end. Memory pool is between.

Can you say if it's a right behavior bacause my system hasn't enough RAM, or a bug ?

by

If i reduse the size of the dialog component's bounds for 1 (x or y, no matter), or use another effect, SwitchToDialog with effect works on target board as expected.

I use SwitchToDialog command as follows:

SwitchToDialog( Dialog, PresentTransition, null, null, null, null, null, null, Complete, null, false );

 

1 Answer

0 votes
by

Hello Gunter,

I assume you are using STM32F769-Discovery board - correct?

Is there some message reported in the console output - typically, the hard fault is just the end...

Btw: Meanwhile we have released version 9.20 - maybe it makes sense to update.

Best regards,

Manfred.

by

I use my custom  board with stm32F777IIT. Have 32F746GDISCOVERY, but it has another display module with less resolution. 

My project for stm32F777IIT is on base of example for 32F746GDISCOVERY. In console i get "Start main cycle..." and later with debugger i get to function MemManage_Handler with "System halted! [MemManage_Handler]"

Btw: Meanwhile we have released version 9.20 - maybe it makes sense to update.

I'll try on demo, but our company have bought the Small Buisness license of 9.00 version.

by
Can you post your MPU settings?

Does it change when you put the second framebuffer not exactly at the end of the SDRAM range (e.g. 1024 bytes before the end)?
by

Can you post your MPU settings?

static void MPU_Config( void )
{
  MPU_Region_InitTypeDef MPU_InitStruct;

  /* Disable the MPU */
  HAL_MPU_Disable();
  
	/* Configure the MPU attributes as WT for SRAM */
  MPU_InitStruct.Enable = MPU_REGION_ENABLE;
  MPU_InitStruct.BaseAddress = 0x20010000;
  MPU_InitStruct.Size = MPU_REGION_SIZE_256KB;
  MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
  MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
  MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
  MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
  MPU_InitStruct.Number = MPU_REGION_NUMBER0;
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
  MPU_InitStruct.SubRegionDisable = 0x00;
  MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
  HAL_MPU_ConfigRegion(&MPU_InitStruct);

#if EW_USE_QSPI_FLASH == 1
 /* Configure the MPU attributes for Quad-SPI area to strongly ordered
     This setting is essentially needed to avoid MCU blockings! 
     See also STM Application Note AN4861 */
  MPU_InitStruct.Enable           = MPU_REGION_ENABLE;
  MPU_InitStruct.Number           = MPU_REGION_NUMBER2;
  MPU_InitStruct.BaseAddress      = 0x90000000;
  MPU_InitStruct.Size             = MPU_REGION_SIZE_256MB;
  MPU_InitStruct.SubRegionDisable = 0x0;
  MPU_InitStruct.TypeExtField     = MPU_TEX_LEVEL0;
  MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
  MPU_InitStruct.DisableExec      = MPU_INSTRUCTION_ACCESS_DISABLE;
  MPU_InitStruct.IsShareable      = MPU_ACCESS_SHAREABLE;
  MPU_InitStruct.IsCacheable      = MPU_ACCESS_NOT_CACHEABLE;
  MPU_InitStruct.IsBufferable     = MPU_ACCESS_NOT_BUFFERABLE;
  HAL_MPU_ConfigRegion(&MPU_InitStruct);

  /* Configure the MPU attributes for the QSPI 16MB to normal memory Cacheable, must reflect the real memory size */
  MPU_InitStruct.Enable           = MPU_REGION_ENABLE;
  MPU_InitStruct.Number           = MPU_REGION_NUMBER3;
  MPU_InitStruct.BaseAddress      = 0x90000000;
  MPU_InitStruct.Size             = MPU_REGION_SIZE_16MB; // Set region size according to the QSPI memory size
  MPU_InitStruct.SubRegionDisable = 0x0;
  MPU_InitStruct.TypeExtField     = MPU_TEX_LEVEL0;
  MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
  MPU_InitStruct.DisableExec      = MPU_INSTRUCTION_ACCESS_DISABLE;
  MPU_InitStruct.IsShareable      = MPU_ACCESS_SHAREABLE;
  MPU_InitStruct.IsCacheable      = MPU_ACCESS_CACHEABLE;
  MPU_InitStruct.IsBufferable     = MPU_ACCESS_NOT_BUFFERABLE;
  HAL_MPU_ConfigRegion(&MPU_InitStruct);
#endif // #if EW_USE_QSPI_FLASH == 1

	/* Configure the MPU attributes for SDRAM_Banks area to strongly ordered
     This setting is essentially needed to avoid MCU blockings!
     See also STM Application Note AN4861 */
  MPU_InitStruct.Enable           = MPU_REGION_ENABLE;
  MPU_InitStruct.Number           = MPU_REGION_NUMBER4;
  MPU_InitStruct.BaseAddress      = 0xC0000000;
  MPU_InitStruct.Size             = MPU_REGION_SIZE_512MB;
  MPU_InitStruct.SubRegionDisable = 0x0;
  MPU_InitStruct.TypeExtField     = MPU_TEX_LEVEL0;
  MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
  MPU_InitStruct.DisableExec      = MPU_INSTRUCTION_ACCESS_DISABLE;
  MPU_InitStruct.IsShareable      = MPU_ACCESS_SHAREABLE;
  MPU_InitStruct.IsCacheable      = MPU_ACCESS_NOT_CACHEABLE;
  MPU_InitStruct.IsBufferable     = MPU_ACCESS_NOT_BUFFERABLE;
  HAL_MPU_ConfigRegion(&MPU_InitStruct);
 
  /* Configure the MPU attributes for SDRAM 16MB to normal memory Cacheable */
  MPU_InitStruct.Enable           = MPU_REGION_ENABLE;
  MPU_InitStruct.Number           = MPU_REGION_NUMBER5;
  MPU_InitStruct.BaseAddress      = 0xC0000000;
  MPU_InitStruct.Size             = MPU_REGION_SIZE_16MB;
  MPU_InitStruct.SubRegionDisable = 0x0;
  MPU_InitStruct.TypeExtField     = MPU_TEX_LEVEL0;
  MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
  MPU_InitStruct.DisableExec      = MPU_INSTRUCTION_ACCESS_ENABLE;
  MPU_InitStruct.IsShareable      = MPU_ACCESS_SHAREABLE;
  MPU_InitStruct.IsCacheable      = MPU_ACCESS_CACHEABLE;
  MPU_InitStruct.IsBufferable     = MPU_ACCESS_BUFFERABLE;
  HAL_MPU_ConfigRegion(&MPU_InitStruct);

  /* Enable the MPU */
  HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
}

 Does it change when you put the second framebuffer not exactly at the end of the SDRAM range (e.g. 1024 bytes before the end)?

Yes

by
Hello Gunter,

the MPU settings are looking fine.

According to application note AN4861 from ST, chapter 4.5.2 "Optimizing the LTDC framebuffer fetching from external memories (SDRAM or SRAM)" the framebuffer should be aligned so that every line fits into 64 bytes.

This means for RGB888 color format and a framebuffer size of 800x480 pixel, that it have to be enhanced to a width of 832 pixel.

The STM32 Platform Package / Build Environment is able to operate with virtual framebuffers - this means, you work with a framebuffer of 832x480 pixel but the application still works with 800x480 pixel.

Can you just change the FRAME_BUFFER_WIDTH to 832 and test again?

Btw: The alignment to 64bytes will reduce the memory bandwidth consumption...

Best regards,

Manfred.
by

Can you just change the FRAME_BUFFER_WIDTH to 832 and test again?

It worked too, thank you about noticed about optimizations.

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