I have observed the same issue and we did further analysis together with the NXP support team. The reason for the shift effect is a LCD underflow. This means, the LCD controller does not get enough data from the internal bus.
I assume you are using version 9.20 of Embedded Wizard and the RT1050 Build Environment - there you will find a prepared solution to avoid the LCD underflows.
Please have a look into the file /TargetSpecific/ew_bsp_display.c - there you will find the following code snippet within the function EwBspConfigDisplay():
/* In case you get LCD underflows (e.g. flickering of LCD while PXP is active),
you can increase the read priority for the LCD by modifying the NIC read_qos
value for it. It is at 0x41044100 (register that isn’t in the header file)
The default value is 1 which is a pretty low priority.
If you change this register to a value grater than 1 (up to 5), then that
will make the LCD higher priority. It should solve the underflow issue.
If it creates a problem for another master, then you might need to experiment
with the value to find something that keeps the LCD from underflowing, but
allows enough bandwidth for other masters.
uint32_t* LCD_read_qos = (uint32_t*)0x41044100;
*LCD_read_qos = 0x02;
Just uncomment that in order to increase the priority of the LCD controller.
Does this solve the shift problem in your environment also?